Résumé du preprint DAPNIA-05-280

DAPNIA-05-280
SAM: a new GHz sampling ASIC for the H.E.S.S.-II Front-End Electronics.
E. Delagnes, Y. Degerli, P. Goret, P. Nayman, F. Toussenel, P. Vincent.
The H.E.S.S.-II front-end electronics, with its 20 GeV energy threshold, will require a much higher acquisition rate capability and a larger dynamic range than was relevant for H.E.S.S.-1. These constraints led to the development of a new ASIC, called SAM for Swift Analogue Memory, to replace the ARS used for H.E.S.S.-1. The SAM chip features 2 channels for the low and high gain outputs of a PMT, each channel having a depth of 256 analogue memory cells. The sampling frequency is adjustable from 0.7GS/s up to 2GS/s and the read-out time for one event is decreased from 275 µs down to 2.3 µs. The SAM input bandwidth and dynamic range are increased up to 300 MHz and more than 11 bits respectively. 

 

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